DocumentCode :
2922721
Title :
Circuit Failure Prediction for Robust System Design in Scaled CMOS
Author :
Mitra, Subhasish
Author_Institution :
Stanford Univ., Stanford, CA
fYear :
2008
fDate :
12-16 Oct. 2008
Firstpage :
145
Lastpage :
145
Abstract :
Circuit failure prediction predicts the occurrence of a circuit failure "before" errors actually appear in system data and states. This is in contrast to classical error detection where a failure is detected after errors appear in system data and states. Circuit failure prediction is performed concurrently during system operation or during periodic on-line self-test by analyzing the data collected by special circuits called "sensors" inserted at strategic locations inside a chip. This talk demonstrated the concept of circuit failure prediction, practical implementation of the concept, and its effectiveness in overcoming major scaled-CMOS reliability challenges such as early-life failures (also called infant mortality) and aging. The concept of circuit failure prediction also provides insignts into early-life failure behaviors that may be used in developing new techniques for screening early-life failure candidates during production test.
Keywords :
CMOS integrated circuits; ageing; failure analysis; integrated circuit design; integrated circuit reliability; aging; circuit failure prediction; infant mortality; periodic on-line self-test; robust system design; scaled-CMOS reliability; strategic locations; Circuit testing; Data analysis; High K dielectric materials; High-K gate dielectrics; Negative bias temperature instability; Niobium compounds; Predictive models; Robustness; Semiconductor device modeling; Titanium compounds;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Reliability Workshop Final Report, 2008. IRW 2008. IEEE International
Conference_Location :
S. Lake Tahoe, CA
ISSN :
1930-8841
Print_ISBN :
978-1-4244-2194-7
Electronic_ISBN :
1930-8841
Type :
conf
DOI :
10.1109/IRWS.2008.4796107
Filename :
4796107
Link To Document :
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