Yield Optimization through Statistical Analysis of Recipe Changes

Semiconductor industry increasingly faces the challenge of rapid yield learning in the context of shrinking device sizes. Turning the "art" of the yield learning into measurable, analyzable and fully predictable process is the holy grail of the industry. Today\´s foundry collects terabytes of data in hopes of finding discerning patterns that could be used for yield optimization. In the paper we turn our attention to one of the most obvious sources of process control and yield optimization - tool recipes. Statistically analyzing the relationship between changes in recipe parameters and the final yield of the devices, we study emerging patterns, derive functional dependencies between process parameters and product yield, and use this acquired knowledge for overall process optimization.