eFuse Design and Reliability

Author

Tonti, W.

fYear

2008

fDate

12-16 Oct. 2008

Firstpage

145

Lastpage

145

Abstract

Summary form only given. Programmable eFuse designs present an integration challenge in modern CMOS processing. The power level to program a fuse, and the programming methodologies leverage reliability mechanisms which all other elements in a design avoid. A high degree of eFuse process control and circuit design is required in order to guarantee operation. Almost all eFuse types are one time programmable and are limited to "one chance" programmable. This tutorial discussed selected eFuse technologies describing the design philosophy electrical programming and characterization, the physics of failure, and some of the many applications an on chip programmable element provides.

Keywords

CMOS digital integrated circuits; integrated circuit reliability; programmable logic arrays; CMOS processing; eFuse circuit design; eFuse process control; programmable eFuse designs; reliability mechanisms; Circuit testing; Data analysis; Dispersion; High K dielectric materials; High-K gate dielectrics; Negative bias temperature instability; Niobium compounds; Predictive models; Semiconductor device modeling; Titanium compounds;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Reliability Workshop Final Report, 2008. IRW 2008. IEEE International

Conference_Location

S. Lake Tahoe, CA

ISSN

1930-8841

Print_ISBN

978-1-4244-2194-7

Electronic_ISBN

1930-8841

Type

conf

DOI

10.1109/IRWS.2008.4796111

Filename

4796111