Reliability defect detection and screening during processing-theory and implementation

The authors derive a model that relates electrical in-process measurements to reliability defect occurrence. The model begins with an understanding of reliability defect physics and statistics and then uses elements of semiconductor manufacture yield modeling. An experiment, using intensive microscopic inspections, that was used to verify this model is described. The type and nature of yield and reliability defect monitors and the use of in-process electrical measurements of these monitors for reliability defect detection are described. The implementation of ´maverick´ screens for a highly defective product is outlined, and the improvement in reliability that these screens provide is estimated.<>