Title :
Selective removal of dielectrics from integrated circuits for electron beam probing
Author :
Baerg, W. ; Rao, V.R.M. ; Livengood, R.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
fDate :
March 31 1992-April 2 1992
Abstract :
An apparatus and method for selectively removing dielectric layers from integrated circuits, to expose up to three layers of metal interconnect for electron beam probing, are described. The results are achieved by using a CF/sub 4//O/sub 2/ plasma reactive ion etch process. Fixtures and process conditions were combined to prevent transistor damage, metal sputtering onto sample from various sources, polymer deposition, undercutting and overetching.<>
Keywords :
electron beam applications; probes; semiconductor technology; sputter etching; dielectric layers; electron beam probing; metal interconnect; metal sputtering; overetching; plasma reactive ion etch process; polymer deposition; selective removal; transistor damage; undercutting; Annealing; Dielectrics; Electrodes; Electron beams; Integrated circuit interconnections; Passivation; Plasma applications; Polymers; Voltage; Wet etching;
Conference_Titel :
Reliability Physics Symposium 1992. 30th Annual Proceedings., International
Conference_Location :
San Diego, CA, USA
Print_ISBN :
0-7803-0473-X
DOI :
10.1109/RELPHY.1992.187664
