DocumentCode
2925425
Title
A New Pipeline/parallel Architecture For Prime Factor Discrete Fourier Transform
Author
Fu, Hsin Chis
Author_Institution
National Chiao-Tung University
fYear
1985
fDate
6-8 Nov. 1985
Firstpage
23
Lastpage
28
Keywords
Computer architecture; Convolution; Discrete Fourier transforms; Engines; Fast Fourier transforms; Fourier transforms; Parallel architectures; Parallel processing; Pipelines; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits, Systems and Computers, 1985. Nineteeth Asilomar Conference on
Conference_Location
Pacific Grove, CA,USA
ISSN
1058-6393
Print_ISBN
0-8186-0729-7
Type
conf
DOI
10.1109/ACSSC.1985.671414
Filename
671414
Link To Document