• DocumentCode
    2926153
  • Title

    Design and Application of a Power Quality Monitoring Equipment Based on DSP and CPLD

  • Author

    Sen Ouyang ; Shu Huang ; Yilin Jin ; Runhong Huang

  • Author_Institution
    Coll. of Electr. Power, South China Univ. of Technol., Guangzhou, China
  • fYear
    2011
  • fDate
    25-28 March 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A new design of DSP+CPLD (Complex Programmable Logic Device) power quality monitor (PQM) is presented in this paper. In this PQM, DSP realizes real-time data processing and the control of peripheral devices through CPLD decoding the CPLD is used to generate control timing between DSP and peripheral devices. In this paper, the use of CPLD in design of logic interface between DSP and peripheral devices is described in detail. The feasibility of this design is verified by the simulating results of control timing of CPLD, and the realization of on-line monitoring of power quality indices of PQM is proved by the testing results.
  • Keywords
    decoding; power supply quality; power system measurement; programmable logic devices; signal processing; CPLD decoding; DSP; PQM; complex programmable logic device; control timing; logic interface; online monitoring; peripheral devices; power quality monitoring equipment; real-time data processing; Decoding; Digital signal processing; Monitoring; Phase measurement; Power quality; Timing; Voltage measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power and Energy Engineering Conference (APPEEC), 2011 Asia-Pacific
  • Conference_Location
    Wuhan
  • ISSN
    2157-4839
  • Print_ISBN
    978-1-4244-6253-7
  • Type

    conf

  • DOI
    10.1109/APPEEC.2011.5748343
  • Filename
    5748343