• DocumentCode
    2926506
  • Title

    A fast longer path algorithm for routing grid with obstacles using biconnectivity based length upper bound

  • Author

    Kohira, Yukihide ; Suehiro, Suguru ; Takahashi, Atsushi

  • Author_Institution
    Dept. of Commun. & Integrated Syst., Tokyo Inst. of Technol., Tokyo
  • fYear
    2009
  • fDate
    19-22 Jan. 2009
  • Firstpage
    600
  • Lastpage
    605
  • Abstract
    In recent VLSI systems, signal propagation delays are requested to achieve the specifications with very high accuracy. In order to meet the specifications, the routing of a net often needs to be detoured in order to increase the routing delay. A routing method should utilize a routing area with obstacles as much as possible in order to realize the specifications of nets simultaneously. In this paper, a fast longer path algorithm that generates a path of a net in routing grid so that the length is increased as much as possible is proposed. In the proposed algorithm, an upper bound for the length in which the structure of a routing area is taken into account is used. Experiments show that our algorithm utilizes a routing area with obstacles efficiently.
  • Keywords
    VLSI; delays; network routing; VLSI; biconnectivity; fast longer path algorithm; length upper bound; obstacles; routing grid; signal propagation delays; Controllability; Frequency; Mesh generation; Printed circuits; Propagation delay; Routing; Signal design; Upper bound; Very large scale integration; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
  • Conference_Location
    Yokohama
  • Print_ISBN
    978-1-4244-2748-2
  • Electronic_ISBN
    978-1-4244-2749-9
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2009.4796546
  • Filename
    4796546