A formal high level synthesis approach for DSP architectures

Author

Elleithy, Khaled ; Bayoumi, Magdy

Author_Institution

Southwestern Louisiana Univ., Lafayette, LA, USA

fYear

1990

fDate

3-6 Apr 1990

Firstpage

897

Abstract

An approach is presented for high-level synthesis of digital signal processing (DSP) algorithms. Two features are provided by the approach: completeness and correctness. A given algorithm is represented in a newly developed language termed the algorithm specification language (ASL). ASL had the ability to describe any general algorithm. An automatic procedure is used to transform an ASL representation into a specific realization specification using a correctness preserving set of transformations. The realization format is based on representing the digital architectures by another language called the realization specification language (RSL). Logic programming is used as a user interface for the synthesis procedure

Keywords

computer architecture; computerised signal processing; digital signal processing chips; logic CAD; logic programming; specification languages; ASL; CAD; DSP architectures; RSL; algorithm specification language; automatic procedure; computer aided design; high level synthesis; logic programming; realization specification language; user interface; Circuit synthesis; Computer architecture; Design methodology; Digital signal processing; Digital signal processing chips; High level synthesis; Logic programming; Signal processing algorithms; Software libraries; Specification languages; User interfaces;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1990. ICASSP-90., 1990 International Conference on

Conference_Location

Albuquerque, NM

ISSN

1520-6149

Type

conf

DOI

10.1109/ICASSP.1990.115989

Filename

115989