DocumentCode
292810
Title
Hierarchical techniques for symbolic analysis of large electronic circuits
Author
Jou, Shyh-Jye ; Perng, Mei-Fang ; Su, Chau Chin ; Wang, C.-K.
Author_Institution
Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Volume
1
fYear
1994
fDate
30 May-2 Jun 1994
Firstpage
21
Abstract
A hierarchical symbolic analyzer (SAGA2) for the analysis of electronic circuits is presented. SAGA2 analyzes lumped, linear, or linearized (small-signal) circuits in the S- and Z-domain. For large circuits, a hierarchical two-port method is used that is two to three order faster than that without using the hierarchical method. Also, the memory used is dramatically reduced
Keywords
circuit analysis computing; symbol manipulation; two-port networks; S-domain; SAGA2; Z-domain; hierarchical symbolic analyzer; hierarchical two-port method; large electronic circuits; Circuit analysis; Circuit analysis computing; Electronic circuits; Equations; Flow graphs; Signal analysis; Switched capacitor networks; Switches; Transfer functions; Transmission line matrix methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location
London
Print_ISBN
0-7803-1915-X
Type
conf
DOI
10.1109/ISCAS.1994.408745
Filename
408745
Link To Document