Universality of interface trap generation and its impact on ID degradation in strained/unstrained PMOS transistors under NBTI stress

Despite extensive use of strained technology, it is still unclear whether NBTI-induced NIT generation in strained transistors is substantially different from that of unstrained ones. Here, we present a comprehensive theory for NIT generation in strained/unstrained transistors and show its universality over a wide range of strain. We further propose that an appropriately designed/optimized transistor might reduce/eliminate NBTI being a concern for CMOS scaling.