• DocumentCode
    2928810
  • Title

    Reconfigurable processing: the solution to low-power programmable DSP

  • Author

    Rabaey, Jan M.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
  • Volume
    1
  • fYear
    1997
  • fDate
    21-24 Apr 1997
  • Firstpage
    275
  • Abstract
    One of the most compelling issues in the design of wireless communication components is to keep power dissipation between bounds. While low-power solutions are readily achieved in an application-specific approach, doing so in a programmable environment is a substantially harder problem. This paper presents an approach to low-power programmable DSP that is based on the dynamic reconfiguration of hardware modules. This technique has shown to yield at least an order of magnitude of power reduction compared to traditional instruction-based engines for problems in the area of wireless communication
  • Keywords
    digital signal processing chips; modules; programming environments; radio equipment; reconfigurable architectures; telecommunication computing; dynamic reconfiguration; hardware modules; instruction-based engines; low power programmable DSP; power dissipation; power reduction; programmable environment; reconfigurable processing; wireless communication components design; Computational modeling; Computer architecture; Digital signal processing; Distributed computing; Dynamic programming; Engines; GSM; Hardware; Power dissipation; Vehicle dynamics;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, 1997. ICASSP-97., 1997 IEEE International Conference on
  • Conference_Location
    Munich
  • ISSN
    1520-6149
  • Print_ISBN
    0-8186-7919-0
  • Type

    conf

  • DOI
    10.1109/ICASSP.1997.599622
  • Filename
    599622