Title :
A high performance general purpose multi-point signal router
Author :
Sehgal, Naresh Kumar ; Chen, C. Y Roger ; Acken, John M.
Author_Institution :
Libr. Dev. Dept., Intel Corp., Santa Clara, CA, USA
fDate :
30 May-2 Jun 1994
Abstract :
New algorithms are proposed to route multiple points for VLSI layout synthesis in the presence of irregular rectilinear obstacles. The proposed routing algorithms are to be used when layout is nearly complete, such that routing needs to be done by using very limited space between existing layout cells or by routing directly over the cells. A point-to-point routing algorithm is proposed. Which allows more general conditions, including point-to-path routing, over-the-cell routing, multi-layer routing and user guided routing. Then, the point-to-point routing algorithm is generalized to perform multi-point routing. Through benchmarks, we have found that the results of the router either match or outperform those generated by existing algorithms, using significantly fewer search lines
Keywords :
VLSI; circuit layout CAD; integrated circuit layout; network routing; VLSI layout synthesis; general purpose router; high performance router; irregular rectilinear obstacles; multi-layer routing; multi-point signal router; over-the-cell routing; point-to-path routing; point-to-point routing; routing algorithms; user guided routing; Pins; Probes; Routing; Shadow mapping; Signal synthesis; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location :
London
Print_ISBN :
0-7803-1915-X
DOI :
10.1109/ISCAS.1994.408841
