Correctness-preserving synthesis for real-time control software

Formal theories for real-time systems (such as timed process algebra, timed automata and timed Petri nets) have gained great success in the modelling of concurrent timing behavior and in the analysis of real-time properties. However, due to the ineliminable timing differences between a model and its realization, synthesising a software realization from a model in a correctness-preserving way is still a challenging research topic. In this paper, we tackle this problem by solving a set of sub-problems. First, we introduce property relations between real-time systems on the basis of their absolute and relative timing differences. Second, we bridge the timing differences between a model and its realization by a sequence of (absolute and relative) timing differences. Third, we propose two parameterised hypotheses to capture the timing differences between the model and its realization. The parameters of both hypotheses are used to predict the real-time properties of the realization from those of the model. Finally, we introduce a synthesis tool, which shows that the two hypotheses can be satisfied during software synthesis