• DocumentCode
    292985
  • Title

    Graceful degradation in algorithm-based fault tolerant multiprocessor systems

  • Author

    Yajnik, Shalini ; Jha, Niraj K.

  • Author_Institution
    Dept. of Electr. Eng., Princeton Univ., NJ, USA
  • Volume
    2
  • fYear
    1994
  • fDate
    30 May-2 Jun 1994
  • Firstpage
    333
  • Abstract
    Algorithm-based fault tolerance (ABFT) is a technique for improving the reliability of a multiprocessor system by providing concurrent error detection and fault location capability to it. In this paper, we propose the first integrated solution to the problem of fault detection, location and graceful degradation in ABFT systems. Unlike most previous methods, we use an extended model for representing ABFT systems, which allows faults to occur in check computing processors
  • Keywords
    Computer architecture; Data processing; Degradation; Electrical fault detection; Fault detection; Fault location; Fault tolerant systems; Image processing; Multiprocessing systems; Signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
  • Conference_Location
    London
  • Print_ISBN
    0-7803-1915-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.1994.408972
  • Filename
    408972