Abstract :
As CMOS technology has continued to scale aggressively, the need for tighter interactions between design and technology has become extremely apparent. In recognition of this trend, a special all-invited session on issues at the convergence of technology and design has been included in the IEDM program this year. The session includes leading speakers from around the world, speaking on various issues lying at the intersection of these fields. The first talk, by Professor T. Sakurai from the University of Tokyo will focus on technology-circuit interaction issues for the design of low-power circuits. The second talk, by Professor P. Gupta from University of California, Los Angeles will discuss the use of devices with tunable parameters for use in future generations of logic technology. The third talk, by Professor A. Strojwas from Carnegie-Mellon University and PDF Solutions will focus on interplay between yield, variability, and robust design. Continuing with an analysis of variability and its impacts, the fourth talk, by Professor A. Asenov from the University of Glasgow will discuss the use of statistical simulation techniques to model variability and reliability in highly scaled devices. The last three talks will address specific application areas and technologies at the confluence of design and technology. The fifth talk, by Professor D. Sylvester from the University of Michigan will discuss the design of robust low-power circuits. Recognizing the trend towards ever-increasing functional integration, the sixth talk, by Professor K. Makinwa from TU Delft will discuss the design of temperature sensors in CMOS, while the final talk, by Professor M. Horowitz, from Stanford University will focus on the requirements for future devices intended as CMOS replacements from the perspective of the needs of future circuit applications of the same.