DocumentCode :
2930266
Title :
Novel strong PUF based on nonlinearity of MOSFET subthreshold operation
Author :
Kalyanaraman, Mukund ; Orshansky, Michael
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA
fYear :
2013
fDate :
2-3 June 2013
Firstpage :
13
Lastpage :
18
Abstract :
Many strong silicon physical unclonable functions (PUFs) are known to be vulnerable to machine-learning attacks due to linear separability of the output function. This significantly limits their potential as reliable security primitives. We introduce a novel strong silicon PUF based on the exponential current-voltage behavior in subthreshold region of FET operation which injects strong nonlinearity into the response of the PUF. The PUF, which we term subthreshold current array (SCA) PUF, is implemented as a pair of two-dimensional n × k transistor arrays with all devices subject to stochastic variability operating in subthreshold region. Our PUF is fundamentally different from earlier attempts to inject nonlinearity via digital control techniques, which could also be used with SCA-PUF. Voltages produced by nominally identical arrays are compared to produce a random binary response. SCA-PUF shows excellent security properties. The average inter-class Hamming distance, a measure of uniqueness, is 50.2%. The average intra-class Hamming distance, a measure of response stability, is 4.17%. Crucially, we demonstrate that the introduced PUF is much less vulnerable to modeling attacks. Using machine-learning techniques of support-vector machine with radial basis function kernel and logistic regression for best nonlinear learnability, we observe that “information leakage” (rate of error reduction with learning) is much lower than for delay-based PUFs. Over a wide range of the number of observed challenge-response pairs, the error rate is 3-35X higher than for the delay-based PUF. We also demonstrate an enhanced SCAPUF design utilizing XOR scrambling and show that it has an up to 30X higher error rate compared to the XOR delay-based PUF.
Keywords :
MOSFET; digital control; elemental semiconductors; radial basis function networks; silicon; support vector machines; MOSFET subthreshold operation; Si; XOR delay-based PUF; XOR scrambling; challenge-response pairs; current-voltage behavior; digital control; error reduction; information leakage; inter-class Hamming distance; logistic regression; machine learning attacks; radial basis function kernel; random binary response; response stability; silicon PUF; silicon physical unclonable functions; stochastic variability; subthreshold current array; support vector machine; two-dimensional transistor arrays; Arrays; Computational modeling; Irrigation; Logic gates; Stochastic processes; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Hardware-Oriented Security and Trust (HOST), 2013 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4799-0559-1
Type :
conf
DOI :
10.1109/HST.2013.6581558
Filename :
6581558
Link To Document :
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