DocumentCode
293072
Title
Associative memory architecture for video compression
Author
Idris, F. ; Panchanathan, S.
Author_Institution
Dept. of Electr. Eng., Ottawa Univ., Ont., Canada
Volume
3
fYear
1994
fDate
30 May-2 Jun 1994
Firstpage
93
Abstract
In this paper, we propose a unified associative memory architecture for real-time implementation of motion estimation and frame adaptive vector quantization for video compression. The proposed architecture has the advantages of simplicity, partitionability, and modularity and has hence the potential for VLSI implementation
Keywords
VLSI; adaptive codes; content-addressable storage; memory architecture; motion estimation; real-time systems; vector quantisation; video coding; VLSI implementation; associative memory architecture; frame adaptive vector quantization; modularity; motion estimation; partitionability; real-time implementation; video compression; Associative memory; Computer architecture; Image coding; Memory architecture; Motion estimation; Multimedia communication; Teleconferencing; Vector quantization; Very large scale integration; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location
London
Print_ISBN
0-7803-1915-X
Type
conf
DOI
10.1109/ISCAS.1994.409111
Filename
409111
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