Digital filter bank designs for satellite transponder payloads: implementation on VLSI circuits

Filter banks for frequency multiplexing and demultiplexing of teletraffic channels will be important components in future satellite transponder payloads. In these systems cost-efficiency, related to low-power consumption and compactness, is a major issue. Digital polyphase FFT filter bank designs, based on allpass filters as building blocks, have been found interesting in this context. The paper considers computer architectures for a frequency multiplexing filter bank and a frequency demultiplexing filter bank, both based on the polyphase FFT approach. The considerations are made with respect to low-power implementations and high compactness. The suggested computer architectures are highly regular in that the solutions involve replications of only two different submodules. Since the VLSI technology favors replication of identical submodules, the proposed hardware architectures are well suited for realization on VLSI circuits