5.8 Gb/s 16:1 multiplexer and 1:16 demultiplexer using 1.2 μm BiCMOS

Author

Midtgaard, Jacob ; Svensson, Christer

Author_Institution

Inst. of Comput. Sci., Tech. Univ. Denmark, Lyngby, Denmark

Volume

4

fYear

1994

fDate

30 May-2 Jun 1994

Firstpage

43

Abstract

High speed time-division multiplexers and demultiplexers are important components of modern optical communication systems. They are needed to parallelize the data to allow most of the system to operate at much lower speeds. This paper describes a 16:1 multiplexer and a 1:16 demultiplexer implemented on one IC in a 1.2 μm BiCMOS process. The IC combines fast ECL circuits with CMOS circuits, demonstrating that by utilizing the combination of bipolar and MOS transistors, a VLSI circuit with very high speed interface is feasible

Keywords

BiCMOS digital integrated circuits; VLSI; asynchronous transfer mode; demultiplexing equipment; optical communication equipment; photonic switching systems; time division multiplexing; 1.2 micron; 5.8 Gbit/s; BiCMOS process; CMOS circuits; VLSI circuit; fast ECL circuits; optical communication systems; time-division demultiplexers; time-division multiplexers; very high speed interface; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Clocks; Frequency; Jacobian matrices; Multiplexing; Optical fiber communication; Protocols; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on

Conference_Location

London

Print_ISBN

0-7803-1915-X

Type

conf

DOI

10.1109/ISCAS.1994.409192

Filename

409192