• DocumentCode
    293171
  • Title

    A novel bit-serial design of comb filters for oversampling A/D converters

  • Author

    Tan, Nianxiong ; Eriksson, Sven ; Wanhammar, Lars

  • Author_Institution
    Dept. of Electr. Eng., Linkoping Univ., Sweden
  • Volume
    4
  • fYear
    1994
  • fDate
    30 May-2 Jun 1994
  • Firstpage
    259
  • Abstract
    The non-recursive algorithm of comb filters suitable for bit-serial implementation is described in this paper. It performs decimation on the oversampling delta-sigma modulator output in several stages by utilizing the commutative rule. Each stage performs very simple FIR filtering and decimates the output by a factor of 2. A novel bit-serial design based on this algorithm is then presented. It features regularity and area and power-consumption efficiency. It also provides the possibility of higher frequency operation than existing designs. As an example, a comb filter of the response sinc3(f) with a decimation ratio 32 has been designed in AMS´ 1 μm double-metal CMOS process. It contains only 4500 transistors even by using standard static gates and occupies about 1.1 mm2 active chip area
  • Keywords
    CMOS digital integrated circuits; FIR filters; digital arithmetic; digital filters; digital signal processing chips; sigma-delta modulation; 1 micron; A/D converters; FIR filtering; bit-serial design; comb filters; commutative rule; decimation; double-metal CMOS process; nonrecursive algorithm; oversampling ADC; oversampling delta-sigma modulator output; Algorithm design and analysis; Arithmetic; Convolution; Delta modulation; Design engineering; Energy consumption; Filtering; Finite impulse response filter; Frequency conversion; Read only memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
  • Conference_Location
    London
  • Print_ISBN
    0-7803-1915-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.1994.409246
  • Filename
    409246