Title :
Current mode techniques for multiple valued arithmetic and logic
Author :
Clarke, C.T. ; Nudd, G.R. ; Summerfield, S.
Author_Institution :
Dept. of Comput. Sci., Warwick Univ., Coventry, UK
fDate :
30 May-2 Jun 1994
Abstract :
This paper analyses the general properties of Current Mode Multiple Valued Logic (CMMVL) circuits, and presents a framework for further exploitation. A unified circuit view is proposed in which circuits are described in terms of CMMVL to voltage mode binary decoders, and binary to CMMVL encoders. The relative merits of various encodings are explored for a single digit multiplier. It is shown that CMMVL has an inherent advantage in the VLSI layout of fan-in dominated subsystems such as Wallace trees. The construction of CMMVL circuit cells for general logic is discussed
Keywords :
VLSI; adders; decoding; digital arithmetic; encoding; integrated logic circuits; logic design; multiplying circuits; multivalued logic circuits; CMMVL circuit cells; MVL circuits; VLSI layout; Wallace trees; binary to CMMVL encoders; current mode multiple valued logic; current mode techniques; decoders; fan-in dominated subsystems; multiple valued arithmetic; multiple valued logic; single digit multiplier; Arithmetic; Bidirectional control; Computer science; Current mode circuits; Decoding; Logic circuits; Mirrors; Multivalued logic; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location :
London
Print_ISBN :
0-7803-1915-X
DOI :
10.1109/ISCAS.1994.409251
