• DocumentCode
    2931800
  • Title

    32-core CMP with multi-sliced L2: 2 and 4 cores sharing a L2 slice

  • Author

    Marino, Mario Donato

  • Author_Institution
    Dept. of Comput. Eng., Polytech. Sch. of Univ. of Sao Paulo
  • fYear
    2006
  • fDate
    Oct. 2006
  • Firstpage
    141
  • Lastpage
    150
  • Abstract
    Nowadays the market is moving to have multiple cores on the same chip (chip multiprocessors - CMP) with a multi-sliced L2 which is shared by 2 cores. CMPs with 8 cores can already be found, and future CMPs will have more than 8 cores. It´s interesting to have more than 2 cores sharing their L2 slice. So, the idea is to evaluate future CMPs with 4 processors sharing the same L2 slice, compare them to the present ones with 2 processors sharing it and also with processors with 1 processor per L2. We construct a model and evaluate it with a full-system simulation, using 32 processors, under SPLASH-2 benchmarks. Previous results show that the execution time is improved of about 8.7% for FMM to 40.3% for radiosity
  • Keywords
    cache storage; multiprocessing systems; 32-core CMP; SPLASH-2 benchmarks; chip multiprocessor evaluation; multisliced L2; radiosity; Delay; Power dissipation; Roads; Scalability; Tiles; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture and High Performance Computing, 2006. SBAC-PAD '06. 18TH International Symposium on
  • Conference_Location
    Ouro Preto
  • ISSN
    1550-6533
  • Print_ISBN
    0-7695-2704-3
  • Type

    conf

  • DOI
    10.1109/SBAC-PAD.2006.5
  • Filename
    4032426