• DocumentCode
    293183
  • Title

    A multibit Δ-Σ D/A converter using a charge integrating sub-converter

  • Author

    Kim, Daejeong ; Park, Jaejin ; Kim, Sungjoon ; Jeong, Deog-Kyoon ; Kim, Wonchan

  • Author_Institution
    Dept. of Electron. Eng., Seoul Nat. Univ., South Korea
  • Volume
    4
  • fYear
    1994
  • fDate
    30 May-2 Jun 1994
  • Firstpage
    319
  • Abstract
    A new approach to the design of sub-converter for use in a multibit Δ-Σ D/A converter is described. It uses a differential charge integrator to realize the S/N ratio of more than 75 dB without requiring precise matching among passive elements. The sub-converter was successfully fabricated in a 1.5-μm CMOS technology. Measured results show 65-dB S/(N+D) ratio with an oversampling ratio of 32
  • Keywords
    CMOS integrated circuits; digital-analogue conversion; integrated circuit design; integrating circuits; sigma-delta modulation; 1.5 micron; CMOS technology; S/N ratio; charge integrating sub-converter; differential charge integrator; multibit Δ-Σ D/A converter; oversampling ratio; CMOS technology; Clocks; Dynamic range; Hardware; Interpolation; Linearity; Logic design; Noise shaping; Sampling methods; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
  • Conference_Location
    London
  • Print_ISBN
    0-7803-1915-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.1994.409261
  • Filename
    409261