DocumentCode
2931970
Title
Design and analysis of adaptive-bandwidth all-digital phase-locked loop
Author
Chau, Yawgeng A. ; Chen, Chen-Feng ; Tsai, Kwn-Dai
Author_Institution
Yuan Ze Univ., Yuan Ze
fYear
2007
fDate
Nov. 28 2007-Dec. 1 2007
Firstpage
68
Lastpage
71
Abstract
To obtain better locking performance and wider locking range, the adaptive-bandwidth all-digital phase-locked loop (AB-ADPLL) is proposed and designed in the paper. With the AB-ADPLL, the parameters of the digital loop filter can be adaptively adjusted using a parameter estimator in accordance with the input frequency. From the design example given in the context and corresponding simulation results, it is disclosed that the AB-ADPLL outperforms the non-adaptive ADPLL.
Keywords
digital filters; digital phase locked loops; parameter estimation; adaptive-bandwidth phase-locked loop; all-digital phase-locked loop; digital loop filter; parameter estimator; Adaptive filters; Bandwidth; Damping; Frequency estimation; Parameter estimation; Performance analysis; Phase locked loops; Signal design; Signal processing; Transfer functions; All-Digital Phase-Locked Loop;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Signal Processing and Communication Systems, 2007. ISPACS 2007. International Symposium on
Conference_Location
Xiamen
Print_ISBN
978-1-4244-1446-8
Electronic_ISBN
978-1-4244-1447-5
Type
conf
DOI
10.1109/ISPACS.2007.4445825
Filename
4445825
Link To Document