DocumentCode
293239
Title
Four-quadrant CMOS/BiCMOS multipliers using linear-region MOS transistors
Author
Abel, Christopher ; Sakurai, Satoshi ; Larsen, Frode ; Ismail, Mohammed
Author_Institution
Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA
Volume
5
fYear
1994
fDate
30 May-2 Jun 1994
Firstpage
273
Abstract
This paper discusses the use of common source MOS transistors operating in the linear region to create four-quadrant multipliers. Analyses of two different multipliers based on this concept are presented and verified through SPICE simulations. The second circuit is shown to have low distortion, low sensitivity to mismatch, and good high frequency performance
Keywords
BiCMOS analogue integrated circuits; CMOS analogue integrated circuits; analogue multipliers; harmonic distortion; nonlinear network analysis; BiCMOS multipliers; CMOS multipliers; SPICE simulations; common source MOSFETs; four-quadrant multipliers; linear-region MOS transistors; low distortion; low sensitivity; Analytical models; BiCMOS integrated circuits; Circuit simulation; Degradation; Equations; Frequency; MOSFETs; SPICE; Transconductors; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location
London
Print_ISBN
0-7803-1915-X
Type
conf
DOI
10.1109/ISCAS.1994.409358
Filename
409358
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