DocumentCode
293244
Title
Trading off speed versus dynamic range in switched current circuits
Author
Shah, Peter ; Toumazou, Chris
Author_Institution
Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
Volume
5
fYear
1994
fDate
30 May-2 Jun 1994
Firstpage
297
Abstract
This paper describes the theoretical basis for a design methodology which enables control of the fundamental tradeoff between speed, dynamic range, and power consumption in switched current cells. The presented methods are applied to the design of a very high dynamic range current memory cell and simulation results are given
Keywords
analogue processing circuits; analogue storage; network synthesis; switched current circuits; current memory cell; design methodology; power consumption; speed/dynamic range tradeoff; switched current circuits; Capacitors; Circuit noise; Design engineering; Dynamic range; Noise figure; Noise generators; Phase noise; Power engineering and energy; Switching circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location
London
Print_ISBN
0-7803-1915-X
Type
conf
DOI
10.1109/ISCAS.1994.409365
Filename
409365
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