A dual-quantization multi-bit sigma delta analog/digital converter

Author

Hairapetian, Armond ; Temes, Gabor C.

Author_Institution

Digital Commun. Div., Rockwell Int. Corp., Newport Beach, CA, USA

Volume

5

fYear

1994

fDate

30 May-2 Jun 1994

Firstpage

437

Abstract

The usual steps taken to enhance the performance of ΣΔ A/D converters are increasing the order of the loop, or increasing the resolution of the internal quantizer. In this paper, a dual-quantization technique is employed to increase both the order and the resolution of the internal quantizer. Using dual-quantization technique, the sensitivity of the overall resolution to the nonlinearity of the multibit DAC is reduced. The monolithic realization of a third-order 5-bit modulator demonstrated the capabilities of the dual-quantization architecture

Keywords

CMOS integrated circuits; modulators; quantisation (signal); sigma-delta modulation; switched capacitor networks; ΣΔ A/D converters; analog/digital converter; dual-quantization architecture; loop order; monolithic realization; multi-bit sigma delta ADC; multibit DAC nonlinearity; resolution improvement; Analog-digital conversion; Delay; Delta-sigma modulation; Digital modulation; Feedback; Logic; Noise cancellation; Quantization; Stability; Transfer functions;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on

Conference_Location

London

Print_ISBN

0-7803-1915-X

Type

conf

DOI

10.1109/ISCAS.1994.409403

Filename

409403