DocumentCode :
293309
Title :
A parallel trimming method of offset reduction for comparators and amplifiers
Author :
Zhang, Ming ; Devos, Francis ; PÒne, Jean-François ; Ni, Yang
Author_Institution :
Inst. d´´Electron. Fondamentale, Univ. de Paris-Sud, Orsay, France
Volume :
5
fYear :
1994
fDate :
30 May-2 Jun 1994
Firstpage :
715
Abstract :
In this work, we have proposed a parallel trimming method for analogue circuits based on a tunnel analogue memory in CMOS standard technology. This method can be used to trim simultaneously a large number of circuits with a global control of trimming and a local control of charge injection automatically. The experimental results show that this parallel trimming is efficient and exploitable for CMOS standard technology
Keywords :
CMOS analogue integrated circuits; analogue storage; comparators (circuits); operational amplifiers; CMOS standard technology; amplifiers; analogue circuits; charge injection; comparators; global control; local control; offset reduction; parallel trimming method; tunnel analogue memory; Analog integrated circuits; Automatic control; CMOS analog integrated circuits; CMOS memory circuits; CMOS technology; Control systems; Fabrication; Integrated circuit technology; Nonvolatile memory; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location :
London
Print_ISBN :
0-7803-1915-X
Type :
conf
DOI :
10.1109/ISCAS.1994.409475
Filename :
409475
Link To Document :
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