Title :
Hardware friendly background analysis based complexity reduction in H.264/AVC multiple reference frames motion estimation
Author :
Huang, Yiqing ; Liu, Zhenyu ; Goto, Satoshi ; Ikenaga, Takeshi
Author_Institution :
Waseda Univ., Tokyo
fDate :
Nov. 28 2007-Dec. 1 2007
Abstract :
In H.264 standard, multiple reference frame motion estimation (MRF- ME) can help to generate small residues and improve the performance. However, MRF-ME is also a computation intensive task for video coding system. Many software oriented fast algorithms have been proposed to shorten MRF-ME process. For hardwired real-time encoder, the division of ME part into two pipeline stages degrades the efficiency of many fast algorithms. This paper gives one hardware friendly MRF-ME algorithm to reduce computation complexity in MRF-ME procedure. The proposed algorithm is based on the analysis of macroblock´s (MB´s) feature and restricts search range for static background MB. Through experiment results, with negligible video quality degradation, the proposed background analysis based MRF-ME algorithm can averagely reduce 41.75% ME time for sequences with static background. Moreover, the proposed algorithm is compatible to other fast algorithms and friendly to hardware implementation of H.264 real-time encoder.
Keywords :
computational complexity; motion estimation; video coding; H.264 real-time encoder; H.264/AVC; complexity reduction; hardware friendly background analysis; multiple reference frames motion estimation; video coding system; video quality; Algorithm design and analysis; Automatic voltage control; Bit rate; Degradation; Engines; Hardware; Motion estimation; Signal processing algorithms; Software algorithms; Video coding; Background Analysis; H.264; MRF-ME;
Conference_Titel :
Intelligent Signal Processing and Communication Systems, 2007. ISPACS 2007. International Symposium on
Conference_Location :
Xiamen
Print_ISBN :
978-1-4244-1447-5
Electronic_ISBN :
978-1-4244-1447-5
DOI :
10.1109/ISPACS.2007.4445957