DocumentCode :
2934204
Title :
Nonvolatile runtime-reconfigurable FPGA secured through MRAM-based periodic refresh
Author :
Goncalves, O. ; Prenat, G. ; Di Pendina, G. ; Layer, C. ; Dieny, Bernard
Author_Institution :
UMR8191 (CEA-INAC/UJF/INPG), Spintec, Grenoble, France
fYear :
2013
fDate :
26-29 May 2013
Firstpage :
170
Lastpage :
173
Abstract :
A need expressed in the industry in terms of FPGA (Field Programmable Gate Array) is the radiation hardness. This paper presents a new FPGA architecture designed to meet this requirement, using a hybrid CMOS/Magnetic process that offers specific features such as non-volatility and intrinsic radiation hardness, commonly named MRAM process for Magnetic Random Access Memory process. The main idea is to use DRAM memory (Dynamic Random Access Memory) for the configuration and to use MRAM that stores the configuration to refresh the DRAM. This technique, known as scrubbing technique, enables reloading the configuration of the FPGA periodically avoiding the accumulation of errors. Therefore, the FPGA is intrinsically hardened to radiation with a low area overhead. Moreover, the power consumption is reduced and a dynamic reconfiguration is easily possible by programming the MRAM devices. Results extracted from the 2-input LUT (Look-Up Table) silicon demonstrator that has been designed, fabricated and tested are really encouraging.
Keywords :
CMOS digital integrated circuits; DRAM chips; MRAM devices; field programmable gate arrays; integrated circuit design; 2-input LUT silicon demonstrator; DRAM memory; MRAM-based periodic refresh; dynamic random access memory; dynamic reconfiguration; field programmable gate array; hybrid CMOS process; intrinsic radiation hardness; look-up table; low area overhead; magnetic random access memory process; nonvolatile runtime-reconfigurable FPGA; power consumption; scrubbing technique; Capacitors; Field programmable gate arrays; Magnetic tunneling; Random access memory; Table lookup; Transistors; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Workshop (IMW), 2013 5th IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
978-1-4673-6168-2
Type :
conf
DOI :
10.1109/IMW.2013.6582126
Filename :
6582126
Link To Document :
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