Title :
Multi-bit MIN unit for direct data stream architecture fuzzy logic controllers
Author :
Blezek, Daniel J. ; Patyra, Marek J. ; Grantner, Janos L.
Author_Institution :
Dept. of Comput. Eng., Minnesota Univ., Duluth, MN, USA
Abstract :
This paper presents the design and development of multi-bit minimum (MIN) unit. Such a unit is necessary to efficiently implement the direct data stream (DDS) architecture of fuzzy logic controllers. The mathematical background as well as circuit design, verification, and simulation is described. The advantage of this design is its scalability, as the number of input bits per vector can be increased with a step of four-at a minimal increase in computational rates. These simulation results (standard cells implemented with 2 μm CMOS technology) were confirmed with Mentor Graphics´ professional IC design tools
Keywords :
CMOS digital integrated circuits; circuit CAD; digital control; fuzzy control; fuzzy logic; integrated circuit design; microcontrollers; multivariable control systems; Mentor Graphics IC design tool; circuit design; direct data stream architecture; fuzzy logic controllers; multi-bit MIN unit; multivariable fuzzy control; scalability; simulation; CMOS technology; Circuit simulation; Circuit synthesis; Computational modeling; Computer architecture; Design engineering; Fuzzy logic; Graphics; Hardware; Zinc;
Conference_Titel :
Fuzzy Systems, 1995. International Joint Conference of the Fourth IEEE International Conference on Fuzzy Systems and The Second International Fuzzy Engineering Symposium., Proceedings of 1995 IEEE Int
Conference_Location :
Yokohama
Print_ISBN :
0-7803-2461-7
DOI :
10.1109/FUZZY.1995.409894
