Title :
Universal Rasterizer with edge equations and tile-scan triangle traversal algorithm for graphics processing units
Author :
Sun, Chih-Hao ; Tsao, You-Ming ; Lok, Ka-Hang ; Chien, Shao-Yi
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
June 28 2009-July 3 2009
Abstract :
The rasterization stage in a graphics processing unit (GPU), which consists of triangle setup, rasterization, and parameter interpolation with plane equations, always requires huge operations and is usually the bottleneck of the performance. For real-time applications, a universal rasterizer (UR) with edge equations and a tile-scan triangle traversal algorithm are proposed for low cost graphics rendering. In UR, the basic functions for parameter interpolation and rasterization can be executed with a universal shared hardware to reduce the cost. The result shows that it can minimize the processing time of triangle traversal and guarantee no reiteration when traverse. With the hardware sharing and architecture design techniques of pipelining and scheduling, it can achieve the real-time requirements for graphics applications with reasonable hardware cost.
Keywords :
computer graphic equipment; rendering (computer graphics); scheduling; edge equation; graphics processing unit; low cost graphics rendering; parameter interpolation; pipelining techniques; scheduling; tile-scan triangle traversal algorithm; universal rasterizer; Batteries; Computer architecture; Cost function; Equations; Graphics; Hardware; Interpolation; Pipeline processing; Rendering (computer graphics); Sun; Graphics Hardware; Graphics Rendering; Rasterization;
Conference_Titel :
Multimedia and Expo, 2009. ICME 2009. IEEE International Conference on
Conference_Location :
New York, NY
Print_ISBN :
978-1-4244-4290-4
Electronic_ISBN :
1945-7871
DOI :
10.1109/ICME.2009.5202755