DocumentCode :
2935727
Title :
Synthesis for FPGAs: an overview
Author :
Fawcett, Bradly
Author_Institution :
Xilinx Inc., San Jose, CA, USA
fYear :
1994
fDate :
27-29 Sep 1994
Firstpage :
576
Lastpage :
580
Abstract :
An increasing number of FPGA users are adopting top-down design methodologies using HDLs and logic synthesis. While not a panacea, rapidly-improving synthesis technology is starting to fulfil its promise of enabling efficient, technology-transparent, high-level design. FPGA synthesis tools will continue to improve and evolve. The goal is a top-down design methodology that encompasses design creation, analysis, and physical implementation in a seamless environment, thereby improving designer productivity and increasing silicon efficiency
Keywords :
application specific integrated circuits; circuit optimisation; field programmable gate arrays; hardware description languages; high level synthesis; FPGA synthesis; HDLs; design creation; designer productivity; high-level design; logic synthesis; physical implementation; seamless environment; silicon efficiency; synthesis technology; synthesis tools; technology-transparent design; top-down design methodologies; Application specific integrated circuits; Circuit synthesis; Design methodology; Design optimization; Field programmable gate arrays; Hardware design languages; Logic circuits; Logic design; Logic devices; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
WESCON/94. Idea/Microelectronics. Conference Record
Conference_Location :
Anaheim , CA
ISSN :
1095-791X
Print_ISBN :
0-7803-9992-7
Type :
conf
DOI :
10.1109/WESCON.1994.403534
Filename :
403534
Link To Document :
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