DocumentCode
2935826
Title
A high speed graphics processing application using FPGAs
Author
Owyang, Kirk A.
Author_Institution
Actel Corp., Sunnyvale, CA, USA
fYear
1994
fDate
27-29 Sep 1994
Firstpage
552
Lastpage
556
Abstract
This graphics processing application shows that high level design methods using VHDL or Verilog HDL input with synthesis tools are an excellent choice for FPGA-based systems. The 50 MHz design integrates several complex, high signal count functions in a single FPGA, all described in VHDL code. The advantages of high level FPGA design are not limited to this industry. They apply to any market where time-to-market and ease-of-design are important. The benefits usually far outnumber and outweigh any risks associated with these design techniques
Keywords
computer graphics; field programmable gate arrays; hardware description languages; high level synthesis; 50 MHz; FPGAs; VHDL; Verilog HDL; design techniques; high level design methods; high signal count functions; high speed graphics processing; logic synthesis tools; time-to-market; Computer graphics; Design methodology; Displays; EPROM; Electronics packaging; Field programmable gate arrays; Hardware; Random access memory; Read-write memory; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
WESCON/94. Idea/Microelectronics. Conference Record
Conference_Location
Anaheim , CA
ISSN
1095-791X
Print_ISBN
0-7803-9992-7
Type
conf
DOI
10.1109/WESCON.1994.403538
Filename
403538
Link To Document