DocumentCode :
2936136
Title :
Modeling and simulation of logic circuits using CNFETs and interconnects
Author :
Abiri, Ebrahim ; Salehi, Mohammad Reza ; Mehrjoo, Zahra
Author_Institution :
Dept. of Electr. & Electron. Eng., Shiraz Univ. of Technol., Shiraz, Iran
Volume :
1
fYear :
2010
fDate :
1-2 Aug. 2010
Firstpage :
51
Lastpage :
55
Abstract :
In this paper a new RLC model of a CNFET is presented. The S parameter formulation and analysis is utilized to investigate this two port model for drain to source signal transmission. The characteristic of the new topology is that using CNT interconnects instead of metallic ones, makes the model comfortable to be used in structures with more than one transistor connected to each other like VLSI circuits. Some logic circuits are simulated due to this approach in the end. All simulations are done in software “ADS 2008”.
Keywords :
S-parameters; carbon nanotubes; circuit simulation; field effect transistors; interconnections; logic circuits; logic design; ADS software; C; CNFET; CNT interconnects; RLC model; S parameter formulation; VLSI circuits; logic circuit simulation; source signal transmission; transistor; Artificial intelligence; FETs; Stability analysis; Substrates; Wire; Carbon Nanotube FETS; RLC model; S parameters; logic circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits,Communications and System (PACCS), 2010 Second Pacific-Asia Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-7969-6
Type :
conf
DOI :
10.1109/PACCS.2010.5627019
Filename :
5627019
Link To Document :
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