Title :
Vlsi Systolic Array Implementation Of A Staged Decoder For Bcm Signals
Author :
Caire, G. ; Ventura-Traveset, J. ; Murphy, J. ; Kung, S.Y.
Author_Institution :
Princeton University
Keywords :
Bandwidth; Binary codes; Block codes; CMOS technology; Decoding; Hardware; Signal design; Systolic arrays; Throughput; Very large scale integration;
Conference_Titel :
VLSI Signal Processing, V, 1992., [Workshop on]
Print_ISBN :
0-7803-0811-5
DOI :
10.1109/VLSISP.1992.641046
