A real-time implementation of half-band filters to obtain 18-20 bit resolution from the DSP56ADC16 sigma-delta A/D converter

Author

Park, Sangil

Author_Institution

Motorola Inc., Austin, TX, USA

fYear

1990

fDate

3-6 Apr 1990

Firstpage

989

Abstract

A method of obtaining 18-20-bit resolution from a commercially available 16-bit Σ-Δ A/D converter, the Motorola DSP56ADC16, is presented, and Σ-Δ technology in general is discussed. A series of half-band filters was implemented on the Motorola DSP56001 (24-bit digital signal processor) to take advantage of the third-order noise-shaping methodology and oversampling employed by the DSP56ADC16. Based on this multistage filter implementation and using the 12-bit comb-filter output of the DSP56AC16, a signal-to-noise ratio (SNR) of greater than 3 dB/octave is anticipated. The kernel of the DSP 56001 assembly code for the main macro routine and the parameters for designing the half-band filters are included

Keywords

analogue-digital conversion; delta modulation; digital filters; digital signal processing chips; 12 bit; 16 bit; 20 bit; Motorola DSP56001; Motorola DSP56ADC16; SNR; assembly code; comb-filter; design parameters; digital signal processor; half-band filters; macro routine; multistage filter; oversampling; sigma-delta A/D converter; signal-to-noise ratio; third-order noise-shaping; Additive noise; Assembly; Circuit noise; Delta-sigma modulation; Digital filters; Digital signal processing; Digital signal processors; Kernel; Noise figure; Noise shaping; Quantization; Signal resolution; Signal to noise ratio; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1990. ICASSP-90., 1990 International Conference on

Conference_Location

Albuquerque, NM

ISSN

1520-6149

Type

conf

DOI

10.1109/ICASSP.1990.116045

Filename

116045