A basic quantum dot element: Proposal of a HBT-dot cell for high-packing density memory circuits

In this paper a device consisting of a quantum dot (QD) and a heterobipolar transistor (HBT) is proposed. The quantum dot, which is then used as a memory cell, is designed to contain about hundred electrons. The trapped charge, which is adjacent to the HBT-collector, influences the transistor collector current. Depending on whether an npn or pnp transistor is used, the current can respectively be modulated by the dot-charge induced collector band-bending or by the change in the transistor gain. The current variation can be sensed to recognize the state of the dot. The HBT is a vertical device and its lateral dimensions can be further reduced. This will result in the realization of memory circuits with increased in-plane packing densities. Preliminary modeling results will be presented showing the basic parameters to be achieved. In particular, the open problem areas are to be discussed in order to ultimately achieve such the required technological capability