Title :
Low cost and high reliability extremity CSP packaging technology
Author :
Okuno, Atsushi ; Fujita, Noriko ; Ishikana, Y.
Author_Institution :
Japan Record Co. Ltd., Osaka, Japan
Abstract :
The BGA and CSP markets are increasing worldwide. But these technologies use plastic or ceramic substrates for inter poser, and the packaging sizes are larger than the actual chip size. Recently, wafer level CSP as an advanced packaging technology has been developed. This packaging method starts with the transfer molding method. However, the transfer molding epoxy resin causes large warpage with miss-match expansion between the wafer and insulating layer after molding, thus reliability is low. In this paper, we present a low cost and high reliability wafer level CSP packaging concept. For this packaging we developed a very low warpage, low expansion, high adhesive strength, high purity encapsulating liquid epoxy resin. The coating method used VPES (Vacuum Printing Encapsulation System) to achieve void-less packaging. VPES is very suitable for large-scale production. We achieved low cost and high reliability wafer level CSP as advanced packaging with a good combination of low warpage epoxy resin and VPES
Keywords :
adhesion; chip scale packaging; encapsulation; integrated circuit manufacture; integrated circuit reliability; polymer films; vacuum deposition; 6 to 8 in; CSP packaging technology; high adhesive strength; high reliability packaging technology; large-scale production; liquid epoxy resin encapsulation; low cost packaging technology; low warpage epoxy resin; vacuum printing encapsulation system; wafer level CSP packaging; Adhesive strength; Ceramics; Chip scale packaging; Costs; Epoxy resins; Extremities; Insulation; Plastic packaging; Transfer molding; Wafer scale integration;
Conference_Titel :
Electronic Components and Technology Conference, 1999. 1999 Proceedings. 49th
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5231-9
DOI :
10.1109/ECTC.1999.776363