A 1.2V, 0.1-6.0 GHz, Two-Stage Differential LNA Using Gain Compensation Scheme

Author

Wadatsumi, Junji ; Kousai, Shouhei ; Miyashita, Daisuke ; Hamada, Mototsugu

Author_Institution

Center for Semicond. R&D, Toshiba Corp., Kawasaki

fYear

2008

fDate

23-25 Jan. 2008

Firstpage

175

Lastpage

178

Abstract

A broadband low-noise amplifier (LNA) in a 0.13 mum CMOS is presented. The LNA consists of two cascaded gain stages. The first stage is a resistive feedback amplifier for an input impedance matching, and the second stage is an inductive peaking amplifier for gain compensation. Measurement results exhibit a voltage gain of 14 dB and a gain variation less than 1.7 dB over the frequency range of 0.1 to 6.0 GHz. Its input return loss is below -8.3 dB and the noise figure is 4.0 to 4.7 dB across the bandwidth. The LNA consumes 16 mW from a 1.2 V supply and occupies 0.13 mm².

Keywords

CMOS analogue integrated circuits; MMIC amplifiers; UHF amplifiers; VHF amplifiers; differential amplifiers; feedback amplifiers; impedance matching; low noise amplifiers; wideband amplifiers; CMOS; broadband low noise amplifier; frequency 0.1 GHz to 6.0 GHz; gain 14 dB; gain compensation; inductive peaking amplifier; input impedance matching; noise figure 4.0 dB to 4.7 dB; power 16 mW; resistive feedback amplifier; size 0.13 mum; two stage differential LNA; voltage 1.2 V; Bandwidth; Capacitance; Feedback; Impedance matching; Inverters; Low-noise amplifiers; Noise figure; Performance gain; Radio frequency; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Silicon Monolithic Integrated Circuits in RF Systems, 2008. SiRF 2008. IEEE Topical Meeting on

Conference_Location

Orlando, FL

Print_ISBN

978-1-4244-1855-8

Electronic_ISBN

978-1-4244-1856-5

Type

conf

DOI

10.1109/SMIC.2008.50

Filename

4446284