Early footprint comparison for area I/O packages and first level interconnect

High density packaging (HDP) has a big potential for performance increase and size reduction as well as cost saving. To gain profit from this potential a careful package/first level interconnect and substrate selection is necessary. This selection defines the footprint of components and the number of layers needed to escape from them. The footprint not only includes the area needed for the pad placement but also the area used for each trace to leave the top layer with a via to an inner layer. Thus, it can dominate the spacing needed between two adjacent components. The number of layers for escaping defines the number of layers needed for the substrate if global routing could be done on less layers. These two key features allow us to estimate the advantages and the cost of a solution. In this paper we present models to calculate them. Thus, these models can be used to determine the feasible implementations as well as its associated cost