Structured LDPC Codes with Reversed MTR/ECC for Magnetic Recording Channels

Structured low-density parity-check (LDPC) codes have been studied as practical LDPC codes for magnetic recording channels. These codes, such as array codes and eIRA codes, enable to construct matrices logically. Their performances, however, are not sufficient for inter-symbol-interference (ISI) channels, especially when the block length becomes short and the code rate becomes high. This is due to the structure of the array codes, which are constructed by single cyclic shift matrices. When multiple-bit errors occur in the channel, they are easily connected through the parity check matrix having many single cyclic shifts, and cause performance degradation as if the matrix had four cycles. In this paper, we propose a system using a random interleaved array LDPC (RIA-LDPC) code combined with a reversed maximum-transition-run (MTR) code/error-correction codes (ECC). The system provides significant improvement in the error-rate floor and water-fall performance in short-block-length and high-rate codes.