Title :
Early footprint comparison for area I/0 packages and first level interconnect
Author :
Hirt, E. ; Troster, G.
Author_Institution :
Electronics Lab, ETH Zurich
Keywords :
Assembly; Bonding; Chip scale packaging; Electronics packaging; Flip chip; Integrated circuit packaging; Manufacturing; Space technology; Testing;
Conference_Titel :
Electronic Components and Technology Conference, 1999. 1999 Proceedings. 49th
Conference_Location :
San Diego, CA, USA
Print_ISBN :
0-7803-5231-9
DOI :
10.1109/ECTC.1999.776380
