DocumentCode :
293887
Title :
A fast shaping low power amplifier-comparator integrated circuit for silicon strip detectors
Author :
Spencer, Edwin ; Dorfan, David ; Grillo, Alex ; Kashigin, Sergei ; Rowe, William ; Webster, Alec ; Wilder, Max
Author_Institution :
SCIPP, California Univ., Santa Cruz, CA, USA
Volume :
1
fYear :
1994
fDate :
30 Oct-5 Nov 1994
Firstpage :
325
Abstract :
We have designed and tested a 64 channel amplifier-comparator integrated circuit on the Maxim SHPi bipolar process. The low power design, 840 μW/channel, is intended for use as a front-end with high clock rate silicon strip detector systems. Peaking time at the comparator input is 20 ns, for good double pulse resolution, and noise is near optimum for the technology used We have used the chip successfully in a proton beam test at KEK in Japan with a 40 Mhz data clock
Keywords :
detector circuits; integrated circuit design; nuclear electronics; silicon radiation detectors; 40 MHz; 40 Mhz data clock; 64 channel amplifier-comparator integrated circuit; Maxim SHPi bipolar process; Si strip detectors; double pulse resolution; fast shaping low power amplifier-comparator integrated circuit; front-end; high clock rate silicon strip detector systems; peaking time; proton beam test; Bipolar integrated circuits; Circuit testing; Clocks; Detectors; Integrated circuit noise; Integrated circuit testing; Particle beams; Pulse amplifiers; Silicon; Strips;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium and Medical Imaging Conference, 1994., 1994 IEEE Conference Record
Conference_Location :
Norfolk, VA
Print_ISBN :
0-7803-2544-3
Type :
conf
DOI :
10.1109/NSSMIC.1994.474404
Filename :
474404
Link To Document :
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