A 8.9-ENOB 2.5-εW 150-KS/s non-binary redundant successive approximation ADC in 0.18-μm CMOS for bio-implanted devices

A successive approximation analog-to-digital converter (SAR ADC) with a split-capacitor switching scheme implementing the generalized non-binary redundant SAR algorithm and an energy efficient level shifter is proposed for bio-implanted applications. The generalized non-binary redundant SAR algorithm removes the radix constraint in conventional non-binary redundant SAR algorithm, and the energy efficient level shifter allows optimal power supplies to be chosen independently for the analog and digital blocks. A FOM of 34.7fJ/step has been achieved.