Title :
An Algorithmic Approach To Concurrent Error Detection In Artificial Neural Networks
Author_Institution :
Department of Electronics, Politecnico di Milano piazza L. da Vinci 32, 1-20133 Milano, Italy
Keywords :
Artificial neural networks; Circuits; Computer networks; Concurrent computing; Error correction; Fault detection; Fault tolerance; Intelligent networks; Neurons; Redundancy;
Conference_Titel :
VLSI Signal Processing, V, 1992., [Workshop on]
Print_ISBN :
0-7803-0811-5
DOI :
10.1109/VLSISP.1992.641084
