The effect of spot defects on the parametric yield of long interconnection lines

Author

Wagner, Israel A. ; Koren, Israel

Author_Institution

Dept. of Comput. Sci., Technion-Israel Inst. of Technol., Haifa, Israel

fYear

1995

fDate

13-15 Nov 1995

Firstpage

46

Lastpage

54

Abstract

The effect of non-catastrophic (or soft) defects (i.e., neither short nor open) on long interconnection lines is analyzed and an estimate is derived for the frequency-dependent critical area for such lines. The analysis is based on a transmission-line model of interconnection lines, and the reflections caused by the defect are taken into account. This analysis results in an estimated prediction of the parametric yield, and a practical recommendation for a better jog insertion in VLSI routing

Keywords

VLSI; capacitance; crosstalk; delays; integrated circuit interconnections; integrated circuit modelling; integrated circuit yield; network routing; transmission line theory; VLSI routing; crosstalk capacitance; frequency-dependent critical area; jog insertion; long interconnection lines; noncatastrophic defects; parametric yield; reflections; spot defects; transmission-line model; Circuit faults; Computer science; Delay effects; Delay estimation; Delay lines; Frequency estimation; Integrated circuit interconnections; Performance analysis; Reflection; Yield estimation;

fLanguage

English

Publisher

ieee

Conference_Titel

Defect and Fault Tolerance in VLSI Systems, 1995. Proceedings., 1995 IEEE International Workshop on,

Conference_Location

Lafayette, LA

ISSN

1550-5774

Print_ISBN

0-8186-7107-6

Type

conf

DOI

10.1109/DFTVS.1995.476936

Filename

476936