Capacitive ratio testing and sensor readout

Author

Wang, Bo ; Kajita, Tetsuya ; Sun, Tao ; Temes, Gabor

Author_Institution

Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA

Volume

2

fYear

1997

fDate

19-21 May 1997

Firstpage

1169

Abstract

This paper presents several novel CMOS switched-capacitor circuits for high-accuracy on-chip capacitive ratio testing and sensor readout. Using sigma-delta and correlated-double-sampling (CDS) techniques, these circuits provide accurate digitized capacitive ratio readout. Both single-ended and fully-differential circuits are presented. Simulation results show that the resolution can be as small as 10 ppm. A single-ended circuit was implemented and tested. The measured standard deviation is below 0.08 fF when 10 pF capacitors were tested

Keywords

CMOS analogue integrated circuits; capacitance measurement; capacitors; circuit analysis computing; digital simulation; electron device testing; switched capacitor networks; 10 pF; CMOS switched-capacitor circuits; capacitive ratio testing; capacitors testing; correlated-double-sampling; differential circuits; digitized capacitive ratio readout; on-chip capacitive ratio testing; sensor readout; sigma-delta sampling; simulation; single-ended circuit; standard deviation; Capacitance measurement; Capacitive sensors; Circuit noise; Circuit testing; Delta-sigma modulation; Gas detectors; Low-frequency noise; Noise reduction; Parasitic capacitance; Switched capacitor circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 1997. IMTC/97. Proceedings. Sensing, Processing, Networking., IEEE

Conference_Location

Ottawa, Ont.

ISSN

1091-5281

Print_ISBN

0-7803-3747-6

Type

conf

DOI

10.1109/IMTC.1997.612384

Filename

612384