DocumentCode :
2944033
Title :
900 V DMOS and 1100 V UMOS 4H-SiC power FETs
Author :
Casady, J.B. ; Agarwal, A.K. ; Rowland, L.B. ; Valek, W.F. ; Brandt, C.D.
Author_Institution :
Northrop Grumman Sci. & Technol. Center, Pittsburgh, PA, USA
fYear :
1997
fDate :
23-25 June 1997
Firstpage :
32
Lastpage :
33
Abstract :
While the advantages of SiC power MOSFETs (both UMOS and DMOS type structures) are known, processing issues have prevented these devices from reaching commercial systems. We evaluate the 4H-SiC DMOS (DIMOS) structure and the 4H-SiC UMOS structure using experimental results. We have achieved 1.1 kV SiC UMOS devices and 900 V SiC DMOS devices, which represent the highest reported blocking voltages for both devices to date.
Keywords :
characteristics measurement; electric strength; power MOSFET; semiconductor materials; silicon compounds; wide band gap semiconductors; 1.1 kV; 900 V; DIMOS; DMOS power FETs; SiC; UMOS power FETs; blocking voltages; processing issues; Electric breakdown; Electrical resistance measurement; FETs; Implants; MOSFETs; Silicon carbide; Temperature dependence; Temperature measurement; Thermal conductivity; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference Digest, 1997. 5th
Conference_Location :
Fort Collins, CO, USA
Print_ISBN :
0-7803-3911-8
Type :
conf
DOI :
10.1109/DRC.1997.612463
Filename :
612463
Link To Document :
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